The present application claims priority under 35 U.S.C. .sctn.119 to Korean Application No. 80586 filed Dec. 31, 1997, the entire contents of which are hereby incorporated by reference.
1. Field of the Invention
The present invention is directed to a semiconductor memory device, and in particular, to a contact in a semiconductor memory device and a method of forming the same, such a contact preferably contributing to realization of packing cells in a chip at a high density.
2. Description of the Related Art
In order to electrically interconnect specific devices in semiconductor memory devices, especially, DRAMs (Dynamic Random Access Memories), metal contacts are formed over a silicon substrate, polysilicon layers for a word line and a bit line, and a plate electrode being the upper electrode of a capacitor, respectively. However, prior to formation of these metal contacts, steps are produced between a cell array region and a peripheral region, for example, a core region. These steps arise due to the difference between their deposition heights resulting from deposition of many material layers. In forming the contacts in a semiconductor memory device having such steps, insulating layers at different heights are etched to different depths. That is, a thin portion of an insulating layer is subjected to overetching and a thick portion thereof to underetching, so that it is highly likely to form an incomplete contact.
In particular, when CF.sub.4 is used as an etching solution, as in related art, to form a contact for a plate electrode, its low etch selectivity gives rise to overetching of the plate electrode underlying an insulating layer, making the plate electrode thin, or leaves the insulating layer between the plate electrode and a metal electrode insufficiently etched, resulting in an electrical short. Thus, the use of CF.sub.4 gives undesirable results.
Under these circumstances, a solution to overcome the above problems included extending a plate electrode across a cell array region to a peripheral region, for example, a core region. A metal contact is then formed over this extended plate electrode. A problem with this solution is that the slope between the cell array region having cells and the core region free of cells impedes even formation of the contact. Also, this solution requires that the cell array region be extended to the core region by an area needed for forming the contact therein, eventually decreasing the integration level of the entire semiconductor memory device.